Overview

The most commonly used parameter of digital circuits, the gate delay time, does not exist. This problem emerges most clearly in the high-speed CMOS, above 1 GHz clock frequency. This book explains why that is so and then how to deal with the situation in a practical manner. Most of the large IC companies, and many of the small IC design companies, are now racing to capture above 1 GHz clock CMOS IC markets. A few examples of such companies in the United States are Motorola, Intel and DEC. Numerous small design-only companies are also interested in this technology. The above 1 GHz circuit design is an extremely difficult concept. The text shows that the fastest CMOS circuits can be understood and designed only after understanding their quantum-mechanical nature. The book should help the circuit designer to learn how to deal with the problems of circuit delay when the gate delay is not a valid concept at high switching speeds and how to design the fastest critical paths. It outlines essential and fundamental guidelines for designing the fastest CMOS circuits. It also explains how to design and structure computer-aided designs to deal with above 1 GHz circuits. It should be of interest to IC designers and CAD professionals alike.

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