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This paper describes the results of the analysis and implementation of ultra-fast low-power superconductor digital switching cores based on Rapid Single-Flux- Quantum (RSFQ) technology. In particular, RSFQ circuits for implementation of crossbar, Batcher- banyan and TDM shared bus switching cores are considered, and possible parameters of these circuits are estimated. The results show that the proposed RSFQ digital switches with overall throughput of 2.88 Tbps per chip operating at the exchange frequencies of 30 GHz and dissipating very little power could effectively compete with their semiconductor and photonic counterparts. Based upon the results of the analysis, the Batcher-banyan switching core was chosen for the hardware implementation. Several low- level architectures of the so-called β element, or 2x2 cross-point switch, and also address decoders for a sorting and for an expanding network nodes, were developed and mapped onto RSFQ elementary cells. We consider the support tools and concepts used for the simulation, modeling, and testing of the switching network, namely, physical-level and gate-level simulators of complex RSFQ circuits.

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