High-Level Test Synthesis of Digital VLSI Circuits

Author:   Mike Tien-Chien Lee
Publisher:   Artech House Publishers
Edition:   Unabridged edition
ISBN:  

9780890069073


Pages:   240
Publication Date:   31 January 1997
Format:   Hardback
Availability:   Out of stock   Availability explained
The supplier is temporarily out of stock of this item. It will be ordered for you on backorder and shipped when it becomes available.

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High-Level Test Synthesis of Digital VLSI Circuits


Overview

Explaining how HTS is able to explore the synthesis freedom provided at high-level to derive an inherently testable architecture at low or even no overhead, this text provides an introduction to HTS and helps develop an understanding of this emerging technology by presenting a background of HTS terms, operation scheduling and resource allocation algorithms. The book also covers various HTS techniques for scan and built-in self-test methodologies, register-transfer level test synthesis, examples of several effective HTS schemes for highly testable digital circuits, and more.

Full Product Details

Author:   Mike Tien-Chien Lee
Publisher:   Artech House Publishers
Imprint:   Artech House Publishers
Edition:   Unabridged edition
Dimensions:   Width: 15.80cm , Height: 1.80cm , Length: 22.00cm
Weight:   0.490kg
ISBN:  

9780890069073


ISBN 10:   0890069077
Pages:   240
Publication Date:   31 January 1997
Audience:   Professional and scholarly ,  Professional & Vocational
Format:   Hardback
Publisher's Status:   Active
Availability:   Out of stock   Availability explained
The supplier is temporarily out of stock of this item. It will be ordered for you on backorder and shipped when it becomes available.

Table of Contents

Background. Sequential Depth Reduction During Allocation. Sequential Loop Reduction During Allocation. Testability Synthesis During Scheduling. Conditional Resource Sharing for Testability. State-of-the-Art High-Level Test Synthesis.

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Author Information

Dr. Mike Tien-Chien Lee is a software engineer at Avant! Corp. He holds a Ph.D. in electrical engineering from Princeton University. Dr. Lee serves on program committees of IEEE International Test Synthesis Workshop. He received Best Paper Awards at the Asia and South Pacific Design Automation Conference (ASP-DAC) in 1995, and the IEEE/ACM Design Automation Conference (DAC) in 1996.

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