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OverviewVerilog Hardware Description Language (HDL) is the state-of-the-art method for designing digital and computer systems. Ideally suited to describe both combinational and clocked sequential arithmetic circuits, Verilog facilitates a clear relationship between the language syntax and the physical hardware. It provides a very easy-to-learn and practical means to model a digital system at many levels of abstraction. Computer Arithmetic and Verilog HDL Fundamentals details the steps needed to master computer arithmetic for fixed-point, decimal, and floating-point number representations for all primary operations. Silvaco International s SILOS, the Verilog simulator used in these pages, is simple to understand, yet powerful enough for any application. It encourages users to quickly prototype and de-bug any logic function and enables single-stepping through the Verilog source code. It also presents drag-and-drop abilities. Introducing the three main modeling methods dataflow, behavioral, and structural this self-contained tutorial
Full Product DetailsAuthor: Joseph Cavanagh (Santa Clara University, California, USA)Publisher: CRC Press Imprint: CRC Press ISBN: 9781322625003ISBN 10: 132262500 Pages: 972 Publication Date: 01 January 2009 Audience: General/trade , General Format: Electronic book text Publisher's Status: Active Availability: Available To Order We have confirmation that this item is in stock with the supplier. It will be ordered in for you and dispatched immediately. Table of ContentsReviewsCavanagh has provided readers with a very large work on the topics of addition, subtraction, multiplication, and division. The student who completes a course based on this work will have achieved a great deal. Summing Up: Recommended. CHOICE, June 2010 Author InformationJoseph Cavanagh is an adjunct professor in the computer engineering department at Santa Clara University in California. Tab Content 6Author Website:Countries AvailableAll regions |
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