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Author:   Christel Baier ,  Cesare Tinelli
Publisher:   Springer-Verlag Berlin and Heidelberg GmbH & Co. KG
Imprint:   Springer-Verlag Berlin and Heidelberg GmbH & Co. K
Edition:   2015 ed.
Volume:   9035
Dimensions:   Width: 15.50cm , Height: 3.80cm , Length: 23.50cm
Weight:   1.122kg
ISBN:  

9783662466803

ISBN 10:   3662466805
Pages:   725
Publication Date:   08 April 2015
Audience:   Professional and scholarly ,  Professional & Vocational
Format:   Paperback
Publisher's Status:   Active
Availability:   Manufactured on demand  
We will order this item for you from a manufactured on demand supplier.

Table of Contents

Scalable Timing Analysis with Refinement.- A Formally Verified Hybrid System for the Next-Generation Airborne Collision Avoidance System.- Verified Reachability Analysis of Continuous Systems.- HyComp: An SMT-Based Model Checker for Hybrid Systems.- C2E2: A Verification Tool for Stateflow Models.- Non-cumulative Resource Analysis.- Value Slice: A New Slicing Concept for Scalable Property Checking.- A Method for Improving the Precision and Coverage of Atomicity Violation Predictions.- Commutativity of Reducers.- Inferring Simple Solutions to Recursion-Free Horn Clauses via Sampling.- Analysis of Dynamic Process Networks.- MULTIGAIN: A Controller Synthesis Tool for MDPs with Multiple Mean-Payoff Objectives.- syntMaskFT: A Tool for Synthesizing Masking Fault-Tolerant Programs from Deontic Specifications.- vZ - An Optimizing SMT Solver.- dReach: δ-Reachability Analysis for Hybrid Systems.- Uppaal Stratego.- BINSEC: Binary Code Analysis with Low-Level Regions.- Insight: An Open Binary Analysis Framework.- SAM: The Static Analysis Module of the MAVERIC Mobile App Security Verification Platform.- Symbolic Model-Checking Using ITS-Tools.- Semantic Importance Sampling for Statistical Model Checking.- Strategy Synthesis for Stochastic Games with Multiple Long-Run Objectives.- FAUST2: Formal Abstractions of Uncountable-State Stochastic Processes.- Linearly Ordered Attribute Grammar Scheduling Using SAT-Solving.- On Parallel Scalable Uniform SAT Witness Generation.- Approximate Counting in SMT and Value Estimation for Probabilistic Programs.- Pushing the Envelope of Optimization Modulo Theories with Linear-Arithmetic Cost Functions.- Stateless Model Checking for TSO and PSO.- GPU Accelerated Strong and Branching Bisimilarity Checking.- Fairness for Infinite-State Systems.- Software Verification and Verifiable Witnesses.- AProVE: Termination and Memory Safety of C Programs.- Cascade.- CPAchecker with Support for Recursive Programs and Floating-Point Arithmetic.- CPArec:Verifying Recursive Programs via Source-to-Source Program Transformation.- Framework for Embedded System Verification.- Forester: Shape Analysis Using Tree Automata.- MU-CSeq 0.3: Sequentialization by Read-Implicit and Coarse-Grained Memory Unwindings.- Perentie: Modular Trace Refinement and Selective Value Tracking.- Predator Hunting Party.- SeaHorn: A Framework for Verifying C Programs.- SMACK+Corral: A Modular Verifier.- Ultimate Automizer with Array Interpolation.- Ultimate Kojak with Memory Safety Checks.- Unbounded Lazy-CSeq: A Lazy Sequentialization Tool for C Programs with Unbounded Context Switches.- FuncTion: An Abstract Domain Functor for Termination.- Model Checking Gene Regulatory Networks.- Symbolic Quantitative Robustness Analysis of Timed Automata.- Pattern-Based Refinement of Assume-Guarantee Specifications in Reactive Synthesis.- Assume-Guarantee Synthesis for Concurrent Reactive Programs with Partial Information.- Shield Synthesis: Runtime Enforcement for Reactive Systems.- Verifying Concurrent Programs by Memory Unwinding.- AutoProof: Auto-Active Functional Verification of Object-Oriented Programs.- An LTL Proof System for Runtime Verification.- MARQ: Monitoring at Runtime with QEA.- Parallel Explicit Model Checking for Generalized Bchi Automata.- Limit Deterministic and Probabilistic Automata for LTL\GU.- Saturation-Based Incremental LTL Model Checking with Inductive Proofs.- Nested Antichains for WS1S.- Sylvan: Multi-core Decision Diagrams.- LTSmin: High-Performance Language-Independent Model Checking.- Using a Formal Model to Improve Verification of a Cache-Coherent System-on-Chip.

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