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OverviewThis book describes novel methods for network-on-chip (NoC) design, using source-synchronous high-speed resonant clocks. The authors discuss NoCs from the bottom up, providing circuit level details, before providing architectural simulations. As a result, readers will get a complete picture of how a NoC can be designed and optimized. Using the methods described in this book, readers are enabled to design NoCs that are 5X better than existing approaches in terms of latency and throughput and can also sustain a significantly greater amount of traffic. Full Product DetailsAuthor: Ayan Mandal , Sunil P. Khatri , Rabi MahapatraPublisher: Springer-Verlag New York Inc. Imprint: Springer-Verlag New York Inc. Edition: 2014 ed. Dimensions: Width: 15.50cm , Height: 1.50cm , Length: 23.50cm Weight: 3.672kg ISBN: 9781461494041ISBN 10: 1461494044 Pages: 143 Publication Date: 14 November 2013 Audience: Professional and scholarly , Professional & Vocational Format: Hardback Publisher's Status: Active Availability: Manufactured on demand ![]() We will order this item for you from a manufactured on demand supplier. Table of ContentsReviewsAuthor InformationTab Content 6Author Website:Countries AvailableAll regions |