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Author:   D. Nirmal (Department of Electronics and Communication Engineering, Karunya University, Coimbatore, INDIA.) ,  J. Ajayan (Department of Electronics and Communication Engineering, Karunya University, Coimbatore, INDIA.) ,  Patrick J. Fay (University of Notre Dame)
Publisher:   Taylor & Francis Ltd
Imprint:   CRC Press
Weight:   0.720kg
ISBN:  

9781032061610

ISBN 10:   1032061618
Pages:   290
Publication Date:   22 December 2021
Audience:   Professional and scholarly ,  General/trade ,  Professional & Vocational ,  General
Format:   Hardback
Publisher's Status:   Active
Availability:   In Print  
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Table of Contents

1. An Introduction to Nanoscale CMOS Technology Transistor. 2. High Performance Tunnel Field Effect Transistor (TFET) for Future Low Power Applications. 3. Ultra Low Power III-V Tunnel Field Effect Transistors. 4. Performance Analysis of Carbon Nanotube and Graphene Tunnel Field Effect Transistors. 5. Characterization of Silicon FinFETs Under Nanoscale Dimension. 6. Germenium or SiGe FinFETs for Enhanced Performance in Low Power Applications. 7. Switching Performance Analysis of III-V FinFET. 8. Negative Capacitance Field Effect Transistors to Address the Fundamental Limitations in Technology Scaling. 9. Recent Trends in Compact Modeling of Negative Capacitance Field Effect Transistors. 10. Fundamentals of 2D Materials. 11. Two-Dimensional Transition Metal Dichalcogenide (TMD) Materials in Field Effect Transistor (FET) Devices for Low Power Applications.

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Author Information

D. Nirmal is presently working as an Associate Professor and Head in the Department of Electronics and Communication engineering. His research interests includes Nanoelectronics, 1D/2D Materials, Carbon nanotubes, GaN Technology, Device and Circuit Simulation – GSL, Sensors, Nanoscale device design and modelling. J. Ajayan is an Associate Professor in the Department of Electronics and Communication Engineering at SR University, Telangana, India. His areas of interest are microelectronics, semiconductor devices, nanotechnology, RF integrated circuits and photovoltaics. Patrick Fay is currently a Professor with the Department of Electrical Engineering, University of Notre Dame, Notre Dame, IN, USA. He established the High Speed Circuits and Devices Laboratory, Notre Dame, and oversaw the design, construction, and commissioning of the 9000-ft2 class 100 cleanroom housed in Stinson-Remick Hall at Notre Dame. He has served as the Director of this facility since 2003.

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