Principles of Verifiable Rtl Design: A Functional Coding Style Supporting Verification Processes in Verilog
Author:   Lionel Bening
Publisher:   Springer
ISBN:  

9781280200458


Pages:   253
Publication Date:   01 January 2000
Format:   Undefined
Availability:   Available To Order   Availability explained
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Principles of Verifiable Rtl Design: A Functional Coding Style Supporting Verification Processes in Verilog


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Overview

Explaining how you can write Verilog to describe chip designs at the RT-level in a manner that co-operates with verification processes, this text focuses on how this co-operation can return an order of magnitude improvement in performance and capacity from tools such as simulation and equivalence checkers. It reduces the labour costs of coverage and formal model checking by facilitating communication between the design engineer and the verification engineer. It also orients the RTL style to provide more useful results from the overall verification process.

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Author:   Lionel Bening
Publisher:   Springer
Imprint:   Springer
ISBN:  

9781280200458


ISBN 10:   1280200456
Pages:   253
Publication Date:   01 January 2000
Audience:   General/trade ,  General
Format:   Undefined
Publisher's Status:   Active
Availability:   Available To Order   Availability explained
We have confirmation that this item is in stock with the supplier. It will be ordered in for you and dispatched immediately.

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