Power-Aware Computer Systems: Second International Workshop, PACS 2002 Cambridge, MA, USA, February 2, 2002, Revised Papers

Author:   Babak Falsafi ,  T.N. Vijaykumar
Publisher:   Springer-Verlag Berlin and Heidelberg GmbH & Co. KG
Edition:   2003 ed.
Volume:   2325
ISBN:  

9783540010289


Pages:   226
Publication Date:   07 April 2003
Format:   Paperback
Availability:   In Print   Availability explained
This item will be ordered in for you from one of our suppliers. Upon receipt, we will promptly dispatch it out to you. For in store availability, please contact us.

Our Price $118.80 Quantity:  
Add to Cart

Share |

Power-Aware Computer Systems: Second International Workshop, PACS 2002 Cambridge, MA, USA, February 2, 2002, Revised Papers


Overview

This book constitutes the thoroughly refereed post-proceedings of the Second International Workshop on Power-Aware Computer Systems, PACS 2002, held in Cambridge, MA, USA, in February 2002. The 13 revised full papers presented were carefully selected for inclusion in the book during two rounds of reviewing and revision. The papers are organized in topical sections on power-aware architecture and microarchitecture, power-aware real-time systems, power modeling and monitoring, and power-aware operating systems and compilers.

Full Product Details

Author:   Babak Falsafi ,  T.N. Vijaykumar
Publisher:   Springer-Verlag Berlin and Heidelberg GmbH & Co. KG
Imprint:   Springer-Verlag Berlin and Heidelberg GmbH & Co. K
Edition:   2003 ed.
Volume:   2325
Dimensions:   Width: 15.50cm , Height: 1.20cm , Length: 23.30cm
Weight:   0.730kg
ISBN:  

9783540010289


ISBN 10:   3540010289
Pages:   226
Publication Date:   07 April 2003
Audience:   Professional and scholarly ,  Professional & Vocational
Format:   Paperback
Publisher's Status:   Active
Availability:   In Print   Availability explained
This item will be ordered in for you from one of our suppliers. Upon receipt, we will promptly dispatch it out to you. For in store availability, please contact us.

Table of Contents

Power-Aware Architecture/Microarchitecture.- Early-Stage Definition of LPX: A Low Power Issue-Execute Processor.- Dynamic Tag-Check Omission: A Low Power Instruction Cache Architecture Exploiting Execution Footprints.- A Hardware Architecture for Dynamic Performance and Energy Adaptation.- Multi-Processor Computer System Having Low Power Consumption.- Power-Aware Real-Time Systems.- An Integrated Heuristic Approach to Power-Aware Real-Time Scheduling.- Power-Aware Task Motion for Enhancing Dynamic Range of Embedded Systems with Renewable Energy Sources.- A Low-Power Content-Adaptive Texture Mapping Architecture for Real-Time 3D Graphics.- Power Modeling and Monitoring.- Energy-Driven Statistical Sampling: Detecting Software Hotspots.- Modeling of DRAM Power Control Policies Using Deterministic and Stochastic Petri Nets.- SimDVS: An Integrated Simulation Environment for Performance Evaluation of Dynamic Voltage Scaling Algorithms.- Power-Aware OS and Compilers.- Application-Supported Device Management for Energy and Performance.- Energy-Efficient Server Clusters.- Single Region vs. Multiple Regions: A Comparison of Different Compiler-Directed Dynamic Voltage Scheduling Approaches.

Reviews

Author Information

Tab Content 6

Author Website:  

Countries Available

All regions
Latest Reading Guide

NOV RG 20252

 

Shopping Cart
Your cart is empty
Shopping cart
Mailing List