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OverviewVerilog HDL is the standard hardware description language for the design of digital systems and VLSI devices. This volume shows designers how to describe pieces of hardware functionally in Verilog using a top-down design approach, which is illustrated with a number of large design examples. The work is organized to present material in a progressive manner, beginning with an introduction to Verilog HDL and ending with a complete example of the modelling and testing of a large subsystem. Full Product DetailsAuthor: Elizer Sternheim , R. Singh , Y. TrivediPublisher: Kluwer Academic Publishers Group Imprint: Kluwer Academic Publishers Edition: 1990 ed. Dimensions: Width: 17.00cm , Height: 1.20cm , Length: 24.40cm Weight: 0.415kg ISBN: 9780962748806ISBN 10: 0962748803 Pages: 217 Publication Date: 05 December 1991 Audience: College/higher education , Professional and scholarly , Undergraduate , Postgraduate, Research & Scholarly Format: Paperback Publisher's Status: Active Availability: Manufactured on demand ![]() We will order this item for you from a manufactured on demand supplier. Table of ContentsReviewsAuthor InformationTab Content 6Author Website:Countries AvailableAll regions |