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OverviewThis handbook seeks to provide an in-depth and practical understanding of the digital clock technologies used in building today's telecommunications networks. Covering critical details on the PLL (phase-locked loop) technique for clock synchronization and generation, and the DDS (direct digital synthesizer) technique for clock generation, the work is designed to help the reader achieve synchronization in high-speed networks and frequency stabilization in portable equipment. Discussing both wired and wireless networks, the volume looks at the combination of circuits and systems to give you a more thorough understanding of important design requirements. Full Product DetailsAuthor: Masami Kihara , Pekka Eskelinen , Sadayasu OnoPublisher: Artech House Publishers Imprint: Artech House Publishers Edition: Unabridged edition Dimensions: Width: 15.80cm , Height: 2.30cm , Length: 23.00cm Weight: 0.567kg ISBN: 9781580535069ISBN 10: 1580535062 Pages: 274 Publication Date: 31 October 2002 Audience: College/higher education , Professional and scholarly , General/trade , Undergraduate , Postgraduate, Research & Scholarly Format: Hardback Publisher's Status: Active Availability: Out of stock The supplier is temporarily out of stock of this item. It will be ordered for you on backorder and shipped when it becomes available. Table of ContentsIntroduction to Clocks. Basic Clock Synchronization and Generation. Signal Processing Fundamentals. Introduction to PLL. PLL Characteristic Analysis. Simulation of Digital PLL. Clock Systems in Networks. Digital Synchronization. PLL LSI. Frequency Generation System. DDS Circuit Configuration and Characteristics. DDS Applications. Noise in Clocks. Noise Measurement. Noise Characteristics in Circuits and Devices. Operational and Environmental Effects on Noise Characteristics. Appendixes.ReviewsAuthor InformationTab Content 6Author Website:Countries AvailableAll regions |
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