Computer Architecture: A Quantitative Approach

Awards:   Winner of Intel Recommended Reading List for Developers, 1st Half 2013 - Books for Software Developers 2013 Winner of Intel Recommended Reading List for Developers, 1st Half 2014 - Books for Software Developers 2014 Winner of Intel Recommended Reading List for Developers, 2nd Half 2013 - Books for Software Developers 2013
Author:   John L. Hennessy (Departments of Electrical Engineering and Computer Science, Stanford University, USA) ,  David A. Patterson (Pardee Professor of Computer Science, Emeritus, University of California at Berkeley, USA)
Publisher:   Elsevier Science & Technology
Edition:   5th edition
ISBN:  

9780123838728


Pages:   856
Publication Date:   25 October 2011
Replaced By:   9780124077270
Format:   Paperback
Availability:   In Print   Availability explained
Limited stock is available. It will be ordered for you and shipped pending supplier's limited stock.

Our Price $237.47 Quantity:  
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Computer Architecture: A Quantitative Approach


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Awards

  • Winner of Intel Recommended Reading List for Developers, 1st Half 2013 - Books for Software Developers 2013
  • Winner of Intel Recommended Reading List for Developers, 1st Half 2014 - Books for Software Developers 2014
  • Winner of Intel Recommended Reading List for Developers, 2nd Half 2013 - Books for Software Developers 2013

Overview

Computer Architecture: A Quantitative Approach, Fifth Edition, explores the ways that software and technology in the cloud are accessed by digital media, such as cell phones, computers, tablets, and other mobile devices. The book, which became a part of Intel's 2012 recommended reading list for developers, covers the revolution of mobile computing. It also highlights the two most important factors in architecture today: parallelism and memory hierarchy. This fully updated edition is comprised of six chapters that follow a consistent framework: explanation of the ideas in each chapter; a crosscutting issues section, which presents how the concepts covered in one chapter connect with those given in other chapters; a putting it all together section that links these concepts by discussing how they are applied in real machine; and detailed examples of misunderstandings and architectural traps commonly encountered by developers and architects. Formulas for energy, static and dynamic power, integrated circuit costs, reliability, and availability are included. The book also covers virtual machines, SRAM and DRAM technologies, and new material on Flash memory. Other topics include the exploitation of instruction-level parallelism in high-performance processors, superscalar execution, dynamic scheduling and multithreading, vector architectures, multicore processors, and warehouse-scale computers (WSCs). There are updated case studies and completely new exercises. Additional reference appendices are available online. This book will be a valuable reference for computer architects, programmers, application developers, compiler and system software developers, computer system designers and application developers.

Full Product Details

Author:   John L. Hennessy (Departments of Electrical Engineering and Computer Science, Stanford University, USA) ,  David A. Patterson (Pardee Professor of Computer Science, Emeritus, University of California at Berkeley, USA)
Publisher:   Elsevier Science & Technology
Imprint:   Morgan Kaufmann Publishers In
Edition:   5th edition
Dimensions:   Width: 19.10cm , Height: 4.60cm , Length: 23.50cm
Weight:   1.700kg
ISBN:  

9780123838728


ISBN 10:   012383872
Pages:   856
Publication Date:   25 October 2011
Audience:   Professional and scholarly ,  Professional & Vocational
Replaced By:   9780124077270
Format:   Paperback
Publisher's Status:   Out of Print
Availability:   In Print   Availability explained
Limited stock is available. It will be ordered for you and shipped pending supplier's limited stock.

Table of Contents

Printed Text Chap 1: Fundamentals of Quantitative Design and Analysis Chap 2: Memory Hierarchy Design Chap 3: Instruction-Level Parallelism and Its Exploitation Chap 4: Data-Level Parallelism in Vector, SIMD, and GPU Architectures Chap 5: Multiprocessors and Thread-Level Parallelism Chap 6: The Warehouse-Scale Computer App A: Instruction Set Principles App B: Review of Memory Hierarchy App C: Pipelining: Basic and Intermediate Concepts Online App D: Storage Systems App E: Embedded Systems App F: Interconnection Networks App G: Vector Processors App H: Hardware and Software for VLIW and EPIC App I: Large-Scale Multiprocessors and Scientific Applications App J: Computer Arithmetic App K: Survey of Instruction Set Architectures App L: Historical Perspectives

Reviews

What has made this book an enduring classic is that each edition is not an update, but an extensive revision that presents the most current information and unparalleled insight into this fascinating and fast changing field. For me, after over twenty years in this profession, it is also another opportunity to experience that student-grade admiration for two remarkable teachers. - From the Foreword by Luiz Andre Barroso, Google, Inc.


If Neil Armstrong offers to give you a tour of the lunar module, or Tiger Woods asks you to go play golf with him, you should do it. When Hennessy and Patterson offer to lead you on a tour of where computer architecture is going, they call it Computer Architecture: A Quantitative Approach, 4th Edition. You need one. Tours leave on the hour. - Robert Colwell, Intel lead designer The book has been updated so it covers the latest computer architectures like the 64-bit AMD Opteron as well as those from Sun, Intel and other major vendors ... I highly recommend this book for those learning about computer architecture or those wanting to understand architectures that differ from those they are currently using. It does an excellent job of covering most of the major architectural approaches employed today. - William Wong, Electronic Design, November 2006 Computer hardware is entering into a new era, what with multicore processing, virtualization and other enhancements . Computer Architecture covers these topics and updates the insightful work in the earlier editions that laid out the full range of metrics needed for evaluating processor performance. - Joab Jackson, GCN, November 20, 2006


If Neil Armstrong offers to give you a tour of the lunar module, or Tiger Woods asks you to go play golf with him, you should do it. When Hennessy and Patterson offer to lead you on a tour of where computer architecture is going, they call it Computer Architecture: A Quantitative Approach. You need one. Tours leave on the hour. - Robert Colwell, Intel lead designer


Author Information

John L. Hennessy is the tenth president of Stanford University, where he has been a member of the faculty since 1977 in the departments of electrical engineering and computer science. Hennessy is a Fellow of the IEEE and ACM; a member of the National Academy of Engineering, the National Academy of Science, and the American Philosophical Society; and a Fellow of the American Academy of Arts and Sciences. Among his many awards are the 2001 Eckert-Mauchly Award for his contributions to RISC technology, the 2001 Seymour Cray Computer Engineering Award, and the 2000 John von Neumann Award, which he shared with David Patterson. He has also received seven honorary doctorates. David A. Patterson has been teaching computer architecture at the University of California, Berkeley, since joining the faculty in 1977, where he holds the Pardee Chair of Computer Science. His teaching has been honored by the Distinguished Teaching Award from the University of California, the Karlstrom Award from ACM, and the Mulligan Education Medal and Undergraduate Teaching Award from IEEE. Patterson received the IEEE Technical Achievement Award and the ACM Eckert-Mauchly Award for contributions to RISC, and he shared the IEEE Johnson Information Storage Award for contributions to RAID. He also shared the IEEE John von Neumann Medal and the C & C Prize with John Hennessy. Like his co-author, Patterson is a Fellow of the American Academy of Arts and Sciences, the Computer History Museum, ACM, and IEEE, and he was elected to the National Academy of Engineering, the National Academy of Sciences, and the Silicon Valley Engineering Hall of Fame. He served on the Information Technology Advisory Committee to the U.S. President, as chair of the CS division in the Berkeley EECS department, as chair of the Computing Research Association, and as President of ACM. This record led to Distinguished Service Awards from ACM and CRA.

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