Overview
This book is a comprehensive text on basic, undergraduate-level computer architecture. It starts from theoretical preliminaries and simple Boolean algebra. After a quick discussion on logic gates, it describes three classes of assembly languages: a custom RISC ISA called SimpleRisc, ARM, and x86. In the next part, a processor is designed for the SimpleRisc ISA from scratch. This includes the combinational units, ALUs, processor, basic 5-stage pipeline, and a microcode-based design. The last part of the book discusses caches, virtual memory, parallel programming, multiprocessors, storage devices and modern I/O systems. The book's website has links to slides for each chapter and video lectures hosted on YouTube.
Full Product Details
Author: Smruti R Sarangi
Publisher: White Falcon Publishing
Imprint: White Falcon Publishing
Dimensions:
Width: 21.60cm
, Height: 3.50cm
, Length: 27.90cm
Weight: 1.556kg
ISBN: 9781636403038
ISBN 10: 1636403034
Pages: 682
Publication Date: 01 September 2021
Audience:
General/trade
,
General
Format: Paperback
Publisher's Status: Active
Availability: Available To Order
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Author Information
Prof. Smruti R. Sarangi is the Usha Hasteer Chair Associate Professor in the Department of Computer Science and Engineering at the Indian Institute of Technology (IIT), New Delhi, India. He additionally holds a joint appointment with the Department of Electrical Engineering. Prior to his appointment in IIT Delhi in 2011, he had worked as a Research Staff Member at the IBM Research Labs, Bangalore, and a Senior R&D Engineer in the Advanced Technology Group, Synopsys, Bangalore. Prof. Sarangi graduated with a Ph.D in computer architecture from the University of Illinois at Urbana Champaign in 2007. He obtained a Master's degree from the same university in 2004 and was awarded a Bachelor's degree in Computer Science and Engineering from IIT Kharagpur in 2002.Prof. Sarangi has published more than 100+ research papers in prestigious conferences and journals in the areas of computer architecture, VLSI design, operating systems, and parallel computing. He has been granted 5 US patents and has filed 6 Indian patents. He has received numerous best paper awards and nominations for his research contributions; his work has featured in the MIT Technology Review and in the popular press. He has written two popular textbooks in computer architecture and has also received the teaching excellence award at IIT Delhi for his contributions to undergraduate teaching and has co-chaired a committee to design the computer science curriculum for classes 9 to 12 for the CBSE school board in India. Along with conducting research in different subareas of computer architecture, he takes an active interest in computer science teaching at all levels: from middle school till postgraduate courses.
