Advanced Hardware Design for Error Correcting Codes

Author:   Cyrille Chavet ,  Philippe Coussy
Publisher:   Springer International Publishing AG
Edition:   2015 ed.
ISBN:  

9783319105680


Pages:   192
Publication Date:   11 November 2014
Format:   Hardback
Availability:   Manufactured on demand   Availability explained
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Advanced Hardware Design for Error Correcting Codes


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Overview

This book provides thorough coverage of error correcting techniques. It includes essential basic concepts and the latest advances on key topics in design, implementation, and optimization of hardware/software systems for error correction. The book’s chapters are written by internationally recognized experts in this field. Topics include evolution of error correction techniques, industrial user needs, architectures, and design approaches for the most advanced error correcting codes (Polar Codes, Non-Binary LDPC, Product Codes, etc). This book provides access to recent results, and is suitable for graduate students and researchers of mathematics, computer science, and engineering. • Examines how to optimize the architecture of hardware design for error correcting codes; • Presents error correction codes from theory to optimized architecture for the current and the next generation standards; • Provides coverage of industrial user needs advanced error correcting techniques. Advanced Hardware Design for Error Correcting Codes includes a foreword by Claude Berrou.

Full Product Details

Author:   Cyrille Chavet ,  Philippe Coussy
Publisher:   Springer International Publishing AG
Imprint:   Springer International Publishing AG
Edition:   2015 ed.
Dimensions:   Width: 15.50cm , Height: 1.30cm , Length: 23.50cm
Weight:   4.691kg
ISBN:  

9783319105680


ISBN 10:   331910568
Pages:   192
Publication Date:   11 November 2014
Audience:   Professional and scholarly ,  Professional & Vocational
Format:   Hardback
Publisher's Status:   Active
Availability:   Manufactured on demand   Availability explained
We will order this item for you from a manufactured on demand supplier.

Table of Contents

User Needs.- Challenges and Limitations for Very High Throughput Decoder Architectures for Soft-Decoding.- Implementation of Polar Decoders.- Parallel architectures for Turbo Product Codes Decoding.- VLSI implementations of sphere detectors.- Stochastic Decoders for LDPC Codes.- MP-SoC/NoC architectures for error correction.- ASIP design for multi-standard channel decoders.- Hardware design of parallel interleaver architecture: a survey.                                                                                                                                       

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Author Information

Cyrille Chavet is an Associate Professor at Associate Professors at Université de Bretagne Sud, Lorient, France. Philippe Coussy is an Associate Professor at Associate Professors at Université de Bretagne Sud, Lorient, France.

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