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OverviewHigh Quality Content by WIKIPEDIA articles! In finite-state verification, model checkers examine finite-state machines representing concurrent software systems looking for errors in design. Errors are defined as violations of requirements expressed as properties of the system. In the event that the finite-state machine fails to satisfy the property, a model checker is in some cases capable of producing a counterexample - an execution of the system demonstrating how the error occurs. Property specifications are often written as Linear Temporal Logic (LTL) expressions. Once a requirement is expressed as an LTL formula, a model checker can automatically verify this property against the model. Full Product DetailsAuthor: Lambert M. Surhone , Miriam T. Timpledon , Susan F. MarsekenPublisher: VDM Publishing House Imprint: VDM Publishing House Dimensions: Width: 22.90cm , Height: 0.50cm , Length: 15.20cm Weight: 0.142kg ISBN: 9786130527013ISBN 10: 6130527012 Pages: 88 Publication Date: 21 June 2010 Audience: General/trade , General Format: Paperback Publisher's Status: Active Availability: In Print ![]() This item will be ordered in for you from one of our suppliers. Upon receipt, we will promptly dispatch it out to you. For in store availability, please contact us. Table of ContentsReviewsAuthor InformationTab Content 6Author Website:Countries AvailableAll regions |